FFFFFFF0  20 BC FC FF  MOVHI   FFFCh, r0, r1

FFFFFFF4  21 A0 56 E9  MOVEA   E956h, r1, r1

FFFFFFF8  01 18        JMP     r1

FFFFFFF0  FB AB 66 E9  JR      FFFBE956

// Code executed by reset interrupt handler

void OnReset() {



    // Inert loop. Probably a delay to let system components start up.

    // The whole thing runs for 262136 cycles, which is ~0.0125 seconds.

    for (temp = 0xFFFF; --temp; );



    // Configure system registers

    StatusRegister   = 0;    // LDSR 0 into PSW

    InterruptsEnable = true; // SEI

    CacheEnable      = true; // LDSR 2 into CHCW



    // Configure control registers -- Need more info on these

    *(char *)0x02000024 = 1; // "WROM 1-wait", whatever that is

    *(char *)0x01000580 = 1; // SMREG control register, also unknown



    // Initialize memory regions -- Actual code uses an alternative to memset()

    memset((void *) 0x00020000, 0xFF, 0x20000); // BG, param, window, OAM

    memset((void *) 0x00078000, 0,     0x8000); // Character memory

    memset((void *) 0x05000000, 0,    0x10000); // System RAM (64k)



    // Preparations for program execution

    *(char *)0x02000020 = 8; // I/O timer interrupt enable



    // Code of unknown significance

    call_FFFE4000();          // Unknown function -- Possibly main()

    InterruptsEnable = false; // CLI

    call_FFFBED4E();          // Unknown function -- Why uninitialize?



    // System dealock. With interrupts disabled, HALT will never wake.

    sleep(forever);     // HALT

    StatusRegister = 0; // LDSR 0 into PSW

    return;             // JMP r31 -- I wish I was kidding.

}

FFFC2A94  40 01        MOV     r0, r10

FFFC2A96  00 A8 0C 00  JR      FFFC2AA2

FFFC2A9A  06 DD 00 00  ST.W    r8, 0h[r6]

FFFC2A9E  C4 44        ADD     4h, r6

FFFC2AA0  41 45        ADD     1h, r10

FFFC2AA2  47 0D        CMP     r7, r10

FFFC2AA4  F6 83        BL      FFFC2A9A

FFFC2AA6  1F 18        JMP     r31

Originally posted by Rena

---

It's pretty safe to say the compiler is not that clever, given it bothers to return from a function that contains an unbreakable infinite loop, and to where? The reset handler isn't a loop, is it?

---

FFFBE9D4  02 AC 2C 56  JAL     FFFE4000

FFFBE9D8  00 58        CLI

FFFBE9DA  00 AC 74 03  JAL     FFFBED4E

FFFBE9DE  00 68        HALT

FFFBE9E0  05 70        LDSR    r0, PSW

FFFBE9E2  1F 18        JMP     r31

FFFE4000  40 BE 00 01  MOVHI   0100h, r0, r18

FFFE4004  60 BE 00 05  MOVHI   0500h, r0, r19

FFFE4008  7C 44        ADD     -4h, r3

FFFE400A  E3 DF 00 00  ST.W    r31, 0h[r3]

FFFE400E  00 AC AE AF  JAL     FFFEEFBC

FFFE4012  00 AC 72 02  JAL     FFFE4284

FFFE4016  00 AC 26 02  JAL     FFFE423C

FFFE401A  00 AC 46 02  JAL     FFFE4260

FFFE401E  00 AC FA 01  JAL     FFFE4218

FFFE4022  E3 CF 00 00  LD.W    0h[r3], r31

FFFE4026  64 44        ADD     4h, r3

FFFE4028  1F 18        JMP     r31

• The reason for the dummy loop that occurs first thing when the system starts up is to allow the working memory of the control unit to "warm up" prior to use. The document specifies a 200 microsecond delay, but the Wario Land code lasts easily 12000 times that. The document also encourages 8 dummy reads on the bus.


• 0x02000024 is the Wait Control register (WCR), and bit 0 is the wait configuration for cartridge ROM. The reset default of 0 specifies 2 waits for ROM reads, where setting the bit to 1 speeds it up to only 1 wait. The only other significant bit of this register is bit 1, which behaves the same way for the unused-in-any-commercial-games cartridge expansion capability.


• 0x01000580 is the Stop All Sound Output register (SSTOP), and only bit 0 is significant. When set, no audio output is produced.